1. Field of the Invention
The present invention relates to a method of manufacturing a semiconductor device and a semiconductor device, and more particularly, the invention relates to a semiconductor device including a capacitor having a metal-insulator-metal (MIM) structure in a metal multilayer wiring which forms an integrated circuit and a method of manufacturing such a semiconductor device.
2. Description of the Related Art
An MIM capacitor to which a metal multilayer wiring technology is applied has lower parasitic resistance and parasitic capacitance compared to capacitors which have a metal-oxide semiconductor (MOS) structure or electrodes made of polysilicon. Therefore, using such an MIM capacitor may improve the performance of devices. Though not shown in the figures, an example of such an MIM capacitor is described. A metal wiring layer A is formed on an interlayer insulating film in a semiconductor integrated circuit, and a predetermined region of the metal wiring layer A is made as a first capacitor electrode. A specific metal pattern serving as a second capacitor electrode is provided on the metal wiring layer A with a capacitor insulating film therebetween. In this case, the metal wiring layer B provided in an upper layer with the insulating film therebetween leads out an extraction electrode of the capacitor as well as other wiring circuits, for example, through a via opening with plug wirings.
The structure described above involves the following problems when the via opening which reaches the metal wiring layer A serving as the first capacitor electrode and the via opening which reaches the specific metal pattern serving as the second capacitor electrode are formed simultaneously. When these via openings are formed at the same time, the specific metal pattern as the second capacitor electrode placed over the metal wiring layer A is exposed prior to the metal wiring layer A. Therefore, the specific metal pattern can be over-etched before the via opening reaches the metal wiring layer A. To prevent the metal pattern from being over-etched, a nitride layer serving as an etching stopper can be formed on the specific metal pattern as the second capacitor electrode. However, when the specific metal pattern is being etched, a sidewall polymer is produced since a resist contacts with the nitride layer. The sidewall polymer is difficult to remove even by cleaning and it can cause contamination in the next process.
The present invention has been developed in consideration of the problems mentioned above, and intended to provide a semiconductor device including an MIM capacitor which has efficient and stable wiring connections in a multilayer wiring and a method of manufacturing the same.